DS1489/DS1489A
Quad Line Receiver
General Description
The DS1489/DS1489A are quad line receivers designed to
interface data terminal equipment with data communications
equipment. They are constructed on a single monolithic
silicon chip. These devices satisfy the specifications of EIA
Standard RS-232D. The DS1489/DS1489A meet and exceed
the specifications of MC1489/MC1489A and are
pin-for-pin replacements.
Features
n Four separate receivers per package
n Programmable threshold
n Built-in input threshold hysteresis
n “Fail safe” operating mode: high output for open inputs
n Inputs withstand ±30V
Click here to download National Semiconductor pdf datasheets DS1489/DS1489A Quad Line Receiver
Datasheets Download-National Semiconductor pdf datasheets download
Showing posts with label D. Show all posts
Showing posts with label D. Show all posts
Tuesday, May 14, 2013
DS26C31T/DS26C31M CMOS Quad TRI-STATE® Differential Line Driver
DS26C31T/DS26C31M
CMOS Quad TRI-STATE® Differential Line Driver
General Description
The DS26C31 is a quad differential line driver designed for
digital data transmission over balanced lines. The
DS26C31T meets all the requirements of EIA standard RS-
422 while retaining the low power characteristics of CMOS.
The DS26C31M is compatible with EIA standard RS-422;
however, one exception in test methodology is taken (Note
8). This enables the construction of serial and terminal interfaces
while maintaining minimal power consumption.
The DS26C31 accepts TTL or CMOS input levels and translates
these to RS-422 output levels. This part uses special
output circuitry that enables the drivers to power down without
loading down the bus. This device has enable and disable
circuitry common to all four drivers. The DS26C31 is pin
compatible to the AM26LS31 and the DS26LS31.
All inputs are protected against damage due to electrostatic
discharge by diodes to VCC and ground.
Features
n TTL input compatible
n Typical propagation delays: 6 ns
n Typical output skew: 0.5 ns
n Outputs will not load line when VCC = 0V
n DS26C31T meets the requirements of EIA standard
RS-422
n Operation from single 5V supply
n TRI-STATE outputs for connection to system buses
n Low quiescent current
n Available in surface mount
n Mil-Std-883C compliant
Click here to download National Semiconductor pdf datasheets DS26C31T/DS26C31M CMOS Quad TRI-STATE® Differential Line Driver
Datasheets Download-National Semiconductor pdf datasheets download
CMOS Quad TRI-STATE® Differential Line Driver
General Description
The DS26C31 is a quad differential line driver designed for
digital data transmission over balanced lines. The
DS26C31T meets all the requirements of EIA standard RS-
422 while retaining the low power characteristics of CMOS.
The DS26C31M is compatible with EIA standard RS-422;
however, one exception in test methodology is taken (Note
8). This enables the construction of serial and terminal interfaces
while maintaining minimal power consumption.
The DS26C31 accepts TTL or CMOS input levels and translates
these to RS-422 output levels. This part uses special
output circuitry that enables the drivers to power down without
loading down the bus. This device has enable and disable
circuitry common to all four drivers. The DS26C31 is pin
compatible to the AM26LS31 and the DS26LS31.
All inputs are protected against damage due to electrostatic
discharge by diodes to VCC and ground.
Features
n TTL input compatible
n Typical propagation delays: 6 ns
n Typical output skew: 0.5 ns
n Outputs will not load line when VCC = 0V
n DS26C31T meets the requirements of EIA standard
RS-422
n Operation from single 5V supply
n TRI-STATE outputs for connection to system buses
n Low quiescent current
n Available in surface mount
n Mil-Std-883C compliant
Click here to download National Semiconductor pdf datasheets DS26C31T/DS26C31M CMOS Quad TRI-STATE® Differential Line Driver
Datasheets Download-National Semiconductor pdf datasheets download
Friday, October 5, 2012
DAC0830,DAC0832 National Semiconductor pdf datasheet download
DAC0830,DAC0832
8-Bit μP Compatible, Double-Buffered D to A Converters
General Description
The DAC0830 is an advanced CMOS/Si-Cr 8-bit multiplying
DAC designed to interface directly with the 8080, 8048,
8085, Z80®, and other popular microprocessors. A deposited
silicon-chromium R-2R resistor ladder network divides the
reference current and provides the circuit with excellent
temperature tracking characteristics (0.05% of Full Scale
Range maximum linearity error over temperature). The circuit
uses CMOS current switches and control logic to
achieve low power consumption and low output leakage
current errors. Special circuitry provides TTL logic input voltage
level compatibility.
Double buffering allows these DACs to output a voltage
corresponding to one digital word while holding the next
digital word. This permits the simultaneous updating of any
number of DACs.
The DAC0830 series are the 8-bit members of a family of
microprocessor-compatible DACs (MICRO-DAC™).
Features
n Double-buffered, single-buffered or flow-through digital
data inputs
n Easy interchange and pin-compatible with 12-bit
DAC1230 series
n Direct interface to all popular microprocessors
n Linearity specified with zero and full scale adjust
only—NOT BEST STRAIGHT LINE FIT.
n Works with ±10V reference-full 4-quadrant multiplication
n Can be used in the voltage switching mode
n Logic inputs which meet TTL voltage level specs (1.4V
logic threshold)
n Operates “STAND ALONE” (without μP) if desired
n Available in 20-pin small-outline or molded chip carrier
package
Key Specifications
n Current settling time: 1 μs
n Resolution: 8 bits
n Linearity: 8, 9, or 10 bits (guaranteed over temp.)
n Gain Tempco: 0.0002% FS/°C
n Low power dissipation: 20 mW
n Single power supply: 5 to 15 VDC
Click here to download DAC0830,DAC0832 National Semiconductor pdf datasheet
DatasheetDoc-National Semiconductor pdf datasheet download
8-Bit μP Compatible, Double-Buffered D to A Converters
General Description
The DAC0830 is an advanced CMOS/Si-Cr 8-bit multiplying
DAC designed to interface directly with the 8080, 8048,
8085, Z80®, and other popular microprocessors. A deposited
silicon-chromium R-2R resistor ladder network divides the
reference current and provides the circuit with excellent
temperature tracking characteristics (0.05% of Full Scale
Range maximum linearity error over temperature). The circuit
uses CMOS current switches and control logic to
achieve low power consumption and low output leakage
current errors. Special circuitry provides TTL logic input voltage
level compatibility.
Double buffering allows these DACs to output a voltage
corresponding to one digital word while holding the next
digital word. This permits the simultaneous updating of any
number of DACs.
The DAC0830 series are the 8-bit members of a family of
microprocessor-compatible DACs (MICRO-DAC™).
Features
n Double-buffered, single-buffered or flow-through digital
data inputs
n Easy interchange and pin-compatible with 12-bit
DAC1230 series
n Direct interface to all popular microprocessors
n Linearity specified with zero and full scale adjust
only—NOT BEST STRAIGHT LINE FIT.
n Works with ±10V reference-full 4-quadrant multiplication
n Can be used in the voltage switching mode
n Logic inputs which meet TTL voltage level specs (1.4V
logic threshold)
n Operates “STAND ALONE” (without μP) if desired
n Available in 20-pin small-outline or molded chip carrier
package
Key Specifications
n Current settling time: 1 μs
n Resolution: 8 bits
n Linearity: 8, 9, or 10 bits (guaranteed over temp.)
n Gain Tempco: 0.0002% FS/°C
n Low power dissipation: 20 mW
n Single power supply: 5 to 15 VDC
Click here to download DAC0830,DAC0832 National Semiconductor pdf datasheet
DatasheetDoc-National Semiconductor pdf datasheet download
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